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E2B0009-27-Y2 Semiconductor
Semiconductor MSM6544
42-DOT LCD DRIVER
This version: Nov. 1997 MSM6544 Previous version: Mar. 1996
GENERAL DESCRIPTION
The MSM6544 is a 42-segment duplex driver which can drive the LCD panel up to a maximum of 84 segments. Since the package is a 56-pin small QFP, an LCD module can be compactly configured. An internal RC oscillator is provided for ease of use.
FEATURES
* * * * * * Power supply voltage (VDD) : 3 to 6V LCD driving voltage : 3 to VDD Operating temperature : -40 to +85C Applicable LCD panel : 1/2 duty, 84 segments (Max) Data transmitting clock : 4 MHz (Max) Package: 56-pin plastic QFP (QFP56-P-910-0.65-2K) (Product name : MSM6544GS-2K)
BLOCK DIAGRAM
SEG1 SEG42
BLANK VDD1 VDD2 GND
42-DOT SEGMENT DRIVER
42-BIT SELECTOR
L 42-BIT LATCH LOAD
L 42-BIT LATCH
DATA CLOCK OSC-IN OSC-C OSC-R
DQ
42-BIT SI/PO COMMON DRIVER
COM-A COM-B VLCM VLCL
OSC
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Semiconductor
MSM6544
PIN CONFIGURATION (TOP VIEW)
SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42
1 2 3 4 5 6 7 8 9 10 11 12 13 14
15 16 17 18 19 20 21 22 23 24 25 26 27 28
56 55 54 53 52 51 50 49 48 47 46 45 44 43
SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 VDD2 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16
42 41 40 39 38 37 36 35 34 33 32 31 30 29
SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2
OSC-IN OSC-C OSC-R LOAD DATA CLOCK VDD1 BLANK GND VLCL COM-A VLCM COM-B SEG1
56-Pin Plastic QFP
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Semiconductor
MSM6544
PIN DESCRIPTIONS
* OSC-IN, OSC-C, OSC-R An RC oscillator circuit for 3-pin type can be configured. Since the OSC-IN pin is in a high input impedance state, it is susceptible to noise. * DATA-IN This is the display data input. When this pin is at "H" level, the segments are turned on and when at "L" level, the segments are turned off. * CLOCK Pin for clocking display data in. Display data is shifted on the rising edge of the clock pulse. * LOAD This is the signal for latching the shift register data. When this pin is set at a "H" level, the shift register data is transmitted to LATCH or LATCH . * SEG1 - SEG42 These pins drive the LCD segments. * COM-A, COM-B These pins drive the LCD commons. COM-A and COM-B correspond to LATCH output and LATCH output, respectively. * VDD2 This is connected to the VDD1 pin internally. * VLCM This is the center bias pin of the LCD. Supply the middle voltage between VDD and VLCL. * VLCL This is the power supply pin of the LCD driver. The contrast of the LCD can be adjusted by changing the voltage at this pin, but do not set the voltage less than the GND level. * BLANK This pin is used to test the all segment outputs (SEG1 to SEG42). All segment outputs are turned off when this pin is set to "H" level. The display returns to the condition before the pin was set to "H" level. * VDD1, GND These are power supply voltage and ground pins.
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MSM6544
ABSOLUTE MAXIMUM RATINGS
Parameter Supply Voltage Input Voltage Storage Temperature Symbol VDD VI TSTG Condition Ta = 25C Ta = 25C -- Rating -0.3 to +6.5 GND-0.3 to VDD +0.3 -55 to +150 Unit V V C
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage Operating Temperature LCD Driving Voltage Symbol VDD Top VLCD Condition -- -- VDD-VLCL Range 3 to 6 -40 to +85 3 to VDD Unit V C V
OSC Circuit
Parameter Oscillation Resistance Oscillation Capacitance Current Control Resistance Common Signal Frequency Symbol R0 C0 R1 fCOM Condition -- Film capacitor -- -- Min. 10 0.001 33 25 Typ. -- -- -- -- Max. 68 0.047 220 250 Unit Applicable Pin kW mF kW Hz OSC-R OSC-C OSC-IN COM-A COM-B
R0 OSC-R C0 OSC-C R1 OSC-IN
(MSM6544)
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ELECTRICAL CHARACTERISTICS
DC Characteristics
(VDD = 5.0V Ta = -40 to +85C) Parameter "H" Input Voltage "L" Input Voltage Input Leakage Current Symbol VIH VIL ILI OSC-R OSC-C "H" Output Voltage VOH All segment outputs Corresponding Pin BLANK LOAD DATA CLOCK OSC-IN Condition -- -- VI = 5.0V/0V IO = -200mA VLCM = 2.5V VLCL = 0V IO= -30mA VLCM = 2.5V VLCL = 0V IO= -150mA VLCM = 2.5V VLCL = 0V IO= 150mA IO = 200mA VLCM = 2.5V VLCL = 0V IO= 30mA VLCM = 2.5V VLCL = 0V IO= 150mA VLCM = (5+VLCL)/2 VLCL = 0 to 2V VLCM = (5+VLCL)/2 VLCL = 0 to 2V Fix all inputs to VDD or GND VDD
No load Ro = 47kW Co = 0.0047mF R1 =150kW
Min. Typ. Max. Unit 3.6 GND -- 4.5 4.8 -- -- -- -- -- VDD 1.0 1 -- -- V V mA V V
COM-A COM-B "M" Output Voltage VOM COM-A COM-B OSC-R OSC-C "L" Output Voltage VOL All segment outputs
4.8
--
--
V
2.3
--
2.7
V
-- --
-- --
0.5 0.2
V V
COM-A COM-B Segment Output Impedance Common Output Impedance Static Supply Current Dynamic Supply Current RSEG RCOM IDD1 IDD2 All segment outputs COM-A COM-B
--
--
0.2
V
-- -- -- --
-- -- -- 0.22
10 1.5 100 0.5
kW kW mA mA
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Semiconductor Switching Characteristics
MSM6544
(VDD = 3.0 to 6.0V, Ta = -40 to +85C) Parameter Clock Pulse Frequency Clock Pulse "H" Time Clock Pulse "L" Time Data Setup Time Data Hold Time Load Pulse "H" Time Clock-Load Timing OSC-IN Input Frequency Symbol ff tfH tfL tD-f tf-D tL tf-L fOSC DATA CLOCK LOAD LOAD OSC-IN CLOCK Corresponding Pin Condition -- -- -- -- -- -- -- -- Min. -- 100 100 80 40 100 100 -- Max. 4 -- -- -- -- -- -- 20 Unit MHz ns ns ns ns ns ns kHz
VH DATA-IN VL tD-f tfL
VH VL tf-D tfH VH VH VL tf-L VH tL VH VL (VH = 0.8 VDD, VL = 0.2 VDD)
CLOCK VL
LOAD
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Semiconductor Data Input Timing
* DATA input timing for COM-A Invalid data DATA -- CLOCK LOAD -- -- -- 42 41 40 SEG-DATA (A) 4 3 2 1 SEL "L"
MSM6544
LOAD
* DATA input timing for COM-B Invalid data DATA -- CLOCK LOAD -- -- -- 42 41 40 SEG-DATA (B) 4 3 2 1 SEL "H" LOAD
Output Waveforms
COM-A
COM-B VDD COM-A off off off off COM-B off SEGn on off on VLCL on off on off VLCM VLCL VDD VLCM
on
on
on
on
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FUNCTIONAL DESCRIPTION
Data Input The data input consists of the following three timing sections: i) SEG-DATA section (42-bit) ii) SEL bit section (1-bit) iii) LOAD section A total of 43 bits of 42-bit segment data and 1-bit select bit are taken in the 43-bit shift register at the rising edge of the clock. The segment data corresponds to "L" (segment OFF) and "H" (segment ON). Input the segment data from SEG42 to SEG1 in this order. The select bit following the segment data is a bit used to specify the transmit destination of the segment data. The selection is performed as follows. "L" : LATCH ; corresponds to COM-A "H" : LATCH ; corresponds to COM-B The data from the shift register to LATCH or LATCH is transmitted when the LOAD pin is at the "H" level. The indication corresponding to the transmit destination latch is also changed at the same time that data is transmitted.
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Semiconductor
MSM6544
APPLICATION CIRCUITS
LCD PANEL 1/2 DUTY 84-SEGMENT
COM-B COM-A VDD
RCOM x 2 RLC SEG1 BLANK LOAD From Controller DATA CLOCK VDD1 VDD R1 C0 R0 GND OSC-IN OSC-C OSC-R VLCL MSM6544 SEG42 VLCM COM-A COM-B VLCL RLC
> RCOM=1kW R1>Ro x 3 =
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REFERENCE DATA
IDD2 vs. VDD Characteristic
mA 400 IDD2 300 Requirements * At no lead and during oscillation * At room temperature * R0 = 47 kW * C0 = 0.0047 mF * R1 = 150 kW
200
100
0
1
2
3
4 VDD
5
6
7
V
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Semiconductor
MSM6544
fCOM vs. VDD Characteristics
Hz 60 fCOM 55
Requirements * At room temperature * R0 = 47 kW * C0 = 0.0047 mF * R1 = 150 kW
50
COM-A COM-B
45 1/fCOM 0 1 2 3 4 VDD 5 6 7 V
fCOM vs. R0 Characteristics
Hz 320 240 160 120 fCOM 80 60 40 30 20 15 10 Requirements * At room temperature * VDD = 5.0 kW * R1 . . 3R0 = 0 10 15 22 R0 33 C0 = 0.01mF C0 = 0.0047mF C0 = 0.001mF C0 = 0.0022mF
C0 = 0.047mF 47 68
C0 = 0.022mF kW
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Semiconductor
MSM6544
PACKAGE DIMENSIONS
(Unit : mm)
QFP56-P-910-0.65-2K
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 0.36 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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